1. Field of the Invention
The present invention relates to a driving integrated circuit (IC) for a liquid crystal display, and more particularly, to a driving IC for a liquid crystal display that can overcome RC delay of data lines in which the driving IC is integrated with the liquid crystal display.
2. Discussion of the Related Art
Liquid crystal displays (LCDs) have become widely used for displaying various images including still pictures or moving pictures, and their use has become more widespread with the accelerated improvement of picture quality from improved liquid crystal material and development of pixel processing techniques as well as the display's advantages of lightweight, slimness, and low power consumption.
An active matrix LCD (AM-LCD) generally includes an array substrate as a lower substrate of a liquid crystal panel for displaying images. On the array substrate, a plurality of pixels are arranged in a matrix configuration, a plurality of thin film transistors (TFTs) functioning as a switching element are also formed, and a plurality of gate lines and a plurality of data lines crossing the plurality of gate lines are arranged.
FIG. 1 is a block diagram of a related art AM-LCD.
Referring to FIG. 1, the related art AM-LCD includes a data driver IC 3 for providing a liquid crystal panel 6 with image data inputted by an external video card 1, a gamma voltage IC 4 for supplying a signal voltage to the data driver IC 3, a gate driver IC 5, which provides the liquid crystal panel 6 with a scanning signal for controlling a switching operation of thin film transistors of the liquid crystal panel 6, and a controller 2 for controlling the data driver IC 3 and the gate driver IC 5.
The liquid crystal panel 5 with a resolution of XGA (1024*768 pixels) level has 1024*3 (RGB) data lines. For instance, in an LCD with an XGA resolution, 8 data driver ICs each having 384 output terminals and 4 gate driver ICs each having 200 output terminals are used.
Video data provided by a video card in a main body of a computer is supplied to the data driver IC 3 by a relay of the controller 2. In another example, an analog image signal inputted from a computer is converted into digital video data by an interface module in an LCD monitor, which then inputs the converted digital video data into the LCD.
The gate driver IC 5 applies a scanning pulse once per frame period to each scanning line. The timing of the scanning pulse is interlaced from an upper side of the liquid crystal panel to a lower side. The data driver IC 3 applies a liquid crystal driving voltage, which corresponds to pixels of the row to which the scanning pulse is applied, i.e., it applies a signal voltage to each data line.
In selected pixels to which the scanning pulse is applied, as voltages of corresponding gate electrodes connected to the data line increases, corresponding thin film transistors are turned on.
At this time, the liquid crystal driving voltage is applied to the liquid crystal from the data line via the drain electrode and the source electrode of each of the thin film transistors, so that each of the corresponding pixels charges a pixel capacitance corresponding to a sum of liquid crystal capacitance and storage capacitance. By repeating the above operation, a voltage corresponding to an image signal is applied repeatedly per frame period to a pixel capacitance of the liquid crystal panel.
FIG. 2 is a block diagram of the data driver IC of FIG. 1.
Referring to FIG. 2, a data latch 41 latches video data input on lines 10, 11 and 12 from outside the data drive IC 3. When the LCD receives even and odd video data, the data latch 41 latches input video data in groups of two pixels.
A shift register 40 sequentially generates latch enable signals, which are synchronized with an external input clock signal to store video data in a line latch 42.
The line latch 42 sequentially stores the video data, which are synchronized with the latch enable signals and inputted by the shift register 40.
The line latch 42 includes first and second registers each having at least one line size (number of data lines connected to one data driver IC, for example, 386 6 bits). Once video data corresponding to one line is stored in the first register, the line latch 42 transfers the video data corresponding to one line stored in the first register to the second register. Thereafter, the line latch 42 sequentially stores video data for a next line.
A digital-to-analog converter 43 of the data driver IC divides a selected digital signal voltage into several voltages, converts the divided voltages into analog voltages, and outputs the converted analog voltages to data lines as an image signal through an output buffer 44.
In the related art LCD, a driving IC board, i.e., a board provided with a data driver IC and a gate driver IC is installed separate from the liquid crystal panel.
However, as low temperature polysilicon allows the use of larger-sized glass substrates and, as the integration technology of drive ICs advances, it becomes possible to integrate circuits related to the processing of display signals on the glass substrate. Also, the number and variety of circuits that can be integrated on the glass substrate increases as well.
In other words, the above system-on-LCD includes polysilicon TFTs formed on glass substrates for use in both the pixel array and the drive ICs of a liquid crystal panel.
Because polysilicon has a much higher carrier mobility than amorphous silicon, transistors for drive ICs can be formed on a glass substrate along with the switching transistors for the pixel electrodes. Thus, the fabrication costs of modules in LCDs can be reduced and at the same time power consumption can be also reduced.
However, in the system-on-LCD, load capacitance of the data bus lines increases, because so many data bus lines are formed on the glass substrate, because the size of the glass substrate increases and also because the number of data lines increases. If the load capacitance is increased, problems occur in that waveforms becomes smooth and RC load of the data line is increased.
In the case of the system-on-LCD, the analog voltage must be output from the data driver more stably. For this purpose, the output buffer is required to operate stably with a high output.